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Abstract
Quantum computing is a revolutionary approach to computation that leverages the principles of quantum mechanics, enabling computers to process information in fundamentally different ways than classical computers. Unlike traditional bits, which represent data as either 0s or 1s, quantum bits, or qubits, can exist in multiple states simultaneously due to superposition. Additionally, qubits can be entangled, allowing them to be interconnected in ways that enhance computational power and efficiency. This unique behavior has the potential to run certain types of computation tasks much faster than classical computers can, marking a significant leap forward in technology. When building actual quantum computers to run practical quantum algorithms, one needs efficient ways to map the algorithms to the hardware components, similar to compiling classical algorithms onto CPU/GPU hardware. This thesis aims to tackle some of the important problems in the mapping process. First, can we address hardware errors and algorithm errors at the same time? Second, can we build a better circuit complexity metric to inspire better quantum architecture design, and can we design better quantum algorithms and compilation techniques using this improved metric? Lastly, can we use physics-level simulation results to inspire better circuit-level optimization techniques? We hope to provide positive answers to all three questions above through three separate architectural innovations.